主な掲載内容 (目次より抜粋)
ネットワークと機器
イーサネット技術
高速設計
ギガビットイーサネットと10ギガビットイーサネット
チップ技術と市場動向
市場概観
関連企業情報
その他スイッチチップベンダ
10ギガビットPHYベンダ
スイッチとPHYの比較
Table of Contents
List of Figures
List of Tables
About the Authors
About the Publisher
Preface
Executive Summary
Chapter 1. Networks and Equipment
Chapter 2. Ethernet Technology
Chapter 3. High-Speed Design Issues
Chapter 4. Gigabit and 10G Ethernet Chips
Chapter 5. Technology and Market Trends
Chapter 6. Market Outlook
Chapter 7. AppliedMicro
Chapter 8. Broadcom
Chapter 9. Intel (Fulcrum)
Chapter 10. Marvell
Chapter 11. Vitesse
Chapter 12. Other Switch-Chip Vendors
Chapter 13. 10Gbps PHY Vendors
Chapter 14. Switch and PHY Comparisons
Chapter 15. Conclusions
Appendix: Further Reading
Index
List of Figures
Figure 1 1. Typical LAN architecture.
Figure 1 2. Typical data-center components. (Source: Emulex)
Figure 1 3. Generic network architecture.
Figure 2 4. IEEE 802 standards. (Source: IEEE 802)
Figure 2 5. IEEE 802.3 basic frame format.
Figure 2 6. VPLS switch conceptual model. AC=attachment circuit. (Source: TPack with permis-sion from Lightwave)
Figure 2 7. Hierarchical traffic management.
Figure 2 8. Ethernet physical layer. xMII can be GMII, SGMII, CGMII, or XLGMII, depending on the data rate.
Figure 2 9. 10G Ethernet physical layer. (Source: IEEE 802)
Figure 2 10. Layer model for 40G/100G Ethernet. (Source: IEEE 802.3ba)
Figure 2 11. Modules and interfaces for 10Gbps applications.
Figure 2 12. 40GbE and 100GbE modules and interfaces.
Figure 3 13. Transmitted data eye (left) and received data eye (right) after two connectors and 40 inches. (Source: LSI Logic)
Figure 3 14. Transmitted eye with pre-emphasis (left) and received eye (right). (Source: LSI Logic)
Figure 3 15. Impulse response and equalization.
Figure 3 16. Conceptual diagram of a phase-locked loop.
Figure 4 17. Block diagram of a typical GbE switch.
Figure 4 18. Single-port GbE PHY simplified block diagram.
Figure 4 19. Architecture of a generic SFP+ optical module.
Figure 4 20. 10Gbps serdes architecture.
Figure 4 21. Block diagram of a generic 10GBase-T PHY.
Figure 6 22. Forecast for Ethernet switch chips, 2010-2015. Data does not include ASICs. M=millions.
Figure 6 23. Forecast for 10G Ethernet switch chips, 2010-2015. Revenue excludes ASICs. M=millions.
Figure 6 24. Forecast for 10G Ethernet PHY-port shipments, 2010-2015.
Figure 6 25. Forecast for 40GbE and 100GbE port shipments, 2010-2015. M=millions. Data includes ASICs and ASSPs.
Figure 6 26. Gigabit Ethernet switch-chip and PHY market share, 2009-2010.
Figure 6 27. 10GbE switch revenue, 2009-2010.
Figure 6 28. Optical-PHY market share, 2010.
Figure 8 29. Broadcom 48 GbE+2 10GbE stackable switch.
Figure 9 30. Intel FM6372 internal architecture.
Figure 9 31. Intel FM6372 in a two-stage fat-tree architecture.
Figure 10 32. Marvell 48 GbE+2 10GbE stackable Layer 3 switch.
Figure 11 33. Vitesse 24 GbE+2 10GbE stackable Carrier Ethernet switch.
Figure 11 34. VSC848x equalizer cleaning 10Gbps signal. (Source: Vitesse)
Figure 11 35. Vitesse VSC8248 in a 40GbE application.
Figure 12 36. Centec 48 GbE+4 10GbE Carrier Ethernet switch design.
Figure 12 37. Ethernity Carrier Ethernet application.
Figure 12 38. Xelerated AX340 architecture.
Figure 12 39. Xelerated AX340 in a 16-port GPON line card.
List of Tables
Table 2 1. OSI reference model. (Source: OSI and The Linley Group)
Table 2 2. Ethernet PHY standards. *Depending on the standard used. (Source: IEEE 802)
Table 6 3. Forecast for Fast Ethernet and Gigabit Ethernet switch chips, 2010-2015. Data does not include ASICs. Revenue in millions. (Source: The Linley Group)
Table 6 4. Forecast for 10G Ethernet switch chips, 2010-2015. All data is in millions and excludes ASICs. (Source: The Linley Group)
Table 6 5. Forecast for 10G Ethernet PHY-port shipments, 2010-2015. Data in thousands. (Source: The Linley Group)
Table 6 6. Forecast for 40GbE and 100GbE port shipments, 2010-2015. Includes ASICs and ASSPs. Data in thousands. (Source: The Linley Group)
Table 6 7. Gigabit Ethernet switch-chip and PHY market share, 2009-2010. Totals may not match data due to rounding. (Source: The Linley Group)
Table 6 8. 10GbE switch revenue, 2009-2010. Totals may not match data due to rounding. (Source: The Linley Group)
Table 6 9. Optical-PHY market share, 2010. Totals may not match data due to rounding. (Source: The Linley Group)
Table 7 10. Key parameters for AppliedMicro 10Gbps PHY chips. *Part num-ber is QT2x25-1 for SFP+ version. (Source: AppliedMicro)
Table 7 11. Key parameters for AppliedMicro 10GBase-T PHY chips. (Source: AppliedMicro)
Table 7 12. Key parameters for AppliedMicro 100Gbps gearbox chip. (Source: AppliedMicro)
Table 7 13. Key parameters for AppliedMicro TPX devices. *Requires external PCIe PHY. (Source: AppliedMicro)
Table 8 14. Key parameters for selected Broadcom GbE switch chips. *Using external TCAM. (Source: Broadcom)
Table 8 15. Key parameters for Broadcom data-center switch chips. (Source: Broadcom, except *The Linley Group estimate)
Table 8 16. Key parameters for Broadcom Petra devices. (Source: Broadcom)
Table 8 17. Key parameters for Broadcom XGS Core fabric. *BCM88230/ BCM88235. (Source: Broadcom)
Table 8 18. Key parameters for Broadcom 10Gbps transceivers. *Power with MACSec enabled. (Source: Broadcom, except †The Linley Group estimate)
Table 9 19. Key parameters for selected Intel FM6000 switch chips. *10GbE (XAUI/CX4) ports also support SGMII at 100/1,000/2,500Mbps. (Source: Intel)
Table 10 20. Key parameters for Marvell Prestera-DX enterprise products. (Source: Marvell)
Table 10 21. Key parameters for Marvell Prestera-CX products. (Source: Marvell)
Table 10 22. Key parameters for Marvell optical PHYs. (Source: Marvell)
Table 10 23. Key parameters for Marvell 10GBase-T PHY products. (Source: Marvell)
Table 11 24. Key parameters for Vitesse Carrier Ethernet switch chips. (Source: Vitesse, except *The Linley Group estimate)
Table 11 25. Key parameters for selected Vitesse PHYs. (Source: Vitesse)
Table 12 26. Vendors of GbE and 10GbE switch chips. (Source: vendors)
Table 12 27. Key parameters for Centec Carrier Ethernet switch chips. (Source: Centec)
Table 12 28. Key parameters for Ethernity ENET devices. *RFC2684 Ethernet-to-ATM plus traffic management for a simple IMIX traffic pattern. (Source: Ethernity)
Table 12 29. Key parameters for Mellanox SwitchX chips. *10GbE ports also support SGMII at 1,000Mbps. (Source: Mellanox)
Table 12 30. Key parameters for selected Xelerated switch chips. *Sixteen ports support 2.5Gbps operation. (Source: Xelerated)
Table 13 31. Vendors and status of 10Gbps-and-above Ethernet PHYs. (Source: vendors, except *The Linley Group estimate)
Table 13 32. Key parameters for Aquantia’s 40nm PHY products. (Source: Aquantia)
Table 13 33. Key parameters for Cortina’s CS43xx PHYs. (Source: Cortina, except *The Linley Group estimate)
Table 13 34. Key parameters for Inphi gearbox PHYs. (Source: Inphi)
Table 13 35. Key parameters for NetLogic PHY chips. *Version without XAUI/RXAUI. (Source: NetLogic)
Table 13 36. Key parameters for NetLogic backplane transceivers. (Source: NetLogic)
Table 13 37. Key parameters for PLX second-generation PHY chips. (Source: PLX)
Table 13 38. Key parameters for Semtech gearbox components. (Source Semtech, except *The Linley Group estimate)
Table 14 39. Comparison of 10GbE/40GbE switch chips. (Source: vendors, except *The Linley Group estimate)
Table 14 40. Comparison of 100Gbps-and-above Carrier Ethernet switch chips. (Source: vendors)
Table 14 41. Comparison of Carrier Ethernet switch chips for access applications. (Source: vendors, except *The Linley Group estimate)
Table 14 42. Comparison of 10Gbps EDC components. *With EDC. (Source: vendors)
Table 14 43. Comparison of quad-channel 10Gbps retimers. (Source: vendors)
Table 14 44. Comparison of quad-port 10GBase-T PHY chips. (Source: vendors)
◆詳細はデータリソースウェブページをご覧ください。
http://www.dri.co.jp/auto/report/lg/lgenswphychip11.htm
◆リンレイグループ社 (The Linley Group)
http://www.dri.co.jp/linley/index.htm
株式会社データリソースは米国の調査会社リンレイグループ社 (The Linley Group)の日本販売代理店です。調査レポートの販売、委託調査などを行っています。
◆このプレスリリースに関するお問合せ
http://www.dri.co.jp/mail/quote.php
日本販売代理店
株式会社データリソース
107-0052 東京都港区赤坂1-14-5
アークヒルズエグゼクティブタワーN313
Tel：03-3582-2531 Fax：03-3582-2861
http://www.dri.co.jp
Eメール：info@dri.co.jp
ネットワークと機器
イーサネット技術
高速設計
ギガビットイーサネットと10ギガビットイーサネット
チップ技術と市場動向
市場概観
関連企業情報
その他スイッチチップベンダ
10ギガビットPHYベンダ
スイッチとPHYの比較
Table of Contents
List of Figures
List of Tables
About the Authors
About the Publisher
Preface
Executive Summary
Chapter 1. Networks and Equipment
Chapter 2. Ethernet Technology
Chapter 3. High-Speed Design Issues
Chapter 4. Gigabit and 10G Ethernet Chips
Chapter 5. Technology and Market Trends
Chapter 6. Market Outlook
Chapter 7. AppliedMicro
Chapter 8. Broadcom
Chapter 9. Intel (Fulcrum)
Chapter 10. Marvell
Chapter 11. Vitesse
Chapter 12. Other Switch-Chip Vendors
Chapter 13. 10Gbps PHY Vendors
Chapter 14. Switch and PHY Comparisons
Chapter 15. Conclusions
Appendix: Further Reading
Index
List of Figures
Figure 1 1. Typical LAN architecture.
Figure 1 2. Typical data-center components. (Source: Emulex)
Figure 1 3. Generic network architecture.
Figure 2 4. IEEE 802 standards. (Source: IEEE 802)
Figure 2 5. IEEE 802.3 basic frame format.
Figure 2 6. VPLS switch conceptual model. AC=attachment circuit. (Source: TPack with permis-sion from Lightwave)
Figure 2 7. Hierarchical traffic management.
Figure 2 8. Ethernet physical layer. xMII can be GMII, SGMII, CGMII, or XLGMII, depending on the data rate.
Figure 2 9. 10G Ethernet physical layer. (Source: IEEE 802)
Figure 2 10. Layer model for 40G/100G Ethernet. (Source: IEEE 802.3ba)
Figure 2 11. Modules and interfaces for 10Gbps applications.
Figure 2 12. 40GbE and 100GbE modules and interfaces.
Figure 3 13. Transmitted data eye (left) and received data eye (right) after two connectors and 40 inches. (Source: LSI Logic)
Figure 3 14. Transmitted eye with pre-emphasis (left) and received eye (right). (Source: LSI Logic)
Figure 3 15. Impulse response and equalization.
Figure 3 16. Conceptual diagram of a phase-locked loop.
Figure 4 17. Block diagram of a typical GbE switch.
Figure 4 18. Single-port GbE PHY simplified block diagram.
Figure 4 19. Architecture of a generic SFP+ optical module.
Figure 4 20. 10Gbps serdes architecture.
Figure 4 21. Block diagram of a generic 10GBase-T PHY.
Figure 6 22. Forecast for Ethernet switch chips, 2010-2015. Data does not include ASICs. M=millions.
Figure 6 23. Forecast for 10G Ethernet switch chips, 2010-2015. Revenue excludes ASICs. M=millions.
Figure 6 24. Forecast for 10G Ethernet PHY-port shipments, 2010-2015.
Figure 6 25. Forecast for 40GbE and 100GbE port shipments, 2010-2015. M=millions. Data includes ASICs and ASSPs.
Figure 6 26. Gigabit Ethernet switch-chip and PHY market share, 2009-2010.
Figure 6 27. 10GbE switch revenue, 2009-2010.
Figure 6 28. Optical-PHY market share, 2010.
Figure 8 29. Broadcom 48 GbE+2 10GbE stackable switch.
Figure 9 30. Intel FM6372 internal architecture.
Figure 9 31. Intel FM6372 in a two-stage fat-tree architecture.
Figure 10 32. Marvell 48 GbE+2 10GbE stackable Layer 3 switch.
Figure 11 33. Vitesse 24 GbE+2 10GbE stackable Carrier Ethernet switch.
Figure 11 34. VSC848x equalizer cleaning 10Gbps signal. (Source: Vitesse)
Figure 11 35. Vitesse VSC8248 in a 40GbE application.
Figure 12 36. Centec 48 GbE+4 10GbE Carrier Ethernet switch design.
Figure 12 37. Ethernity Carrier Ethernet application.
Figure 12 38. Xelerated AX340 architecture.
Figure 12 39. Xelerated AX340 in a 16-port GPON line card.
List of Tables
Table 2 1. OSI reference model. (Source: OSI and The Linley Group)
Table 2 2. Ethernet PHY standards. *Depending on the standard used. (Source: IEEE 802)
Table 6 3. Forecast for Fast Ethernet and Gigabit Ethernet switch chips, 2010-2015. Data does not include ASICs. Revenue in millions. (Source: The Linley Group)
Table 6 4. Forecast for 10G Ethernet switch chips, 2010-2015. All data is in millions and excludes ASICs. (Source: The Linley Group)
Table 6 5. Forecast for 10G Ethernet PHY-port shipments, 2010-2015. Data in thousands. (Source: The Linley Group)
Table 6 6. Forecast for 40GbE and 100GbE port shipments, 2010-2015. Includes ASICs and ASSPs. Data in thousands. (Source: The Linley Group)
Table 6 7. Gigabit Ethernet switch-chip and PHY market share, 2009-2010. Totals may not match data due to rounding. (Source: The Linley Group)
Table 6 8. 10GbE switch revenue, 2009-2010. Totals may not match data due to rounding. (Source: The Linley Group)
Table 6 9. Optical-PHY market share, 2010. Totals may not match data due to rounding. (Source: The Linley Group)
Table 7 10. Key parameters for AppliedMicro 10Gbps PHY chips. *Part num-ber is QT2x25-1 for SFP+ version. (Source: AppliedMicro)
Table 7 11. Key parameters for AppliedMicro 10GBase-T PHY chips. (Source: AppliedMicro)
Table 7 12. Key parameters for AppliedMicro 100Gbps gearbox chip. (Source: AppliedMicro)
Table 7 13. Key parameters for AppliedMicro TPX devices. *Requires external PCIe PHY. (Source: AppliedMicro)
Table 8 14. Key parameters for selected Broadcom GbE switch chips. *Using external TCAM. (Source: Broadcom)
Table 8 15. Key parameters for Broadcom data-center switch chips. (Source: Broadcom, except *The Linley Group estimate)
Table 8 16. Key parameters for Broadcom Petra devices. (Source: Broadcom)
Table 8 17. Key parameters for Broadcom XGS Core fabric. *BCM88230/ BCM88235. (Source: Broadcom)
Table 8 18. Key parameters for Broadcom 10Gbps transceivers. *Power with MACSec enabled. (Source: Broadcom, except †The Linley Group estimate)
Table 9 19. Key parameters for selected Intel FM6000 switch chips. *10GbE (XAUI/CX4) ports also support SGMII at 100/1,000/2,500Mbps. (Source: Intel)
Table 10 20. Key parameters for Marvell Prestera-DX enterprise products. (Source: Marvell)
Table 10 21. Key parameters for Marvell Prestera-CX products. (Source: Marvell)
Table 10 22. Key parameters for Marvell optical PHYs. (Source: Marvell)
Table 10 23. Key parameters for Marvell 10GBase-T PHY products. (Source: Marvell)
Table 11 24. Key parameters for Vitesse Carrier Ethernet switch chips. (Source: Vitesse, except *The Linley Group estimate)
Table 11 25. Key parameters for selected Vitesse PHYs. (Source: Vitesse)
Table 12 26. Vendors of GbE and 10GbE switch chips. (Source: vendors)
Table 12 27. Key parameters for Centec Carrier Ethernet switch chips. (Source: Centec)
Table 12 28. Key parameters for Ethernity ENET devices. *RFC2684 Ethernet-to-ATM plus traffic management for a simple IMIX traffic pattern. (Source: Ethernity)
Table 12 29. Key parameters for Mellanox SwitchX chips. *10GbE ports also support SGMII at 1,000Mbps. (Source: Mellanox)
Table 12 30. Key parameters for selected Xelerated switch chips. *Sixteen ports support 2.5Gbps operation. (Source: Xelerated)
Table 13 31. Vendors and status of 10Gbps-and-above Ethernet PHYs. (Source: vendors, except *The Linley Group estimate)
Table 13 32. Key parameters for Aquantia’s 40nm PHY products. (Source: Aquantia)
Table 13 33. Key parameters for Cortina’s CS43xx PHYs. (Source: Cortina, except *The Linley Group estimate)
Table 13 34. Key parameters for Inphi gearbox PHYs. (Source: Inphi)
Table 13 35. Key parameters for NetLogic PHY chips. *Version without XAUI/RXAUI. (Source: NetLogic)
Table 13 36. Key parameters for NetLogic backplane transceivers. (Source: NetLogic)
Table 13 37. Key parameters for PLX second-generation PHY chips. (Source: PLX)
Table 13 38. Key parameters for Semtech gearbox components. (Source Semtech, except *The Linley Group estimate)
Table 14 39. Comparison of 10GbE/40GbE switch chips. (Source: vendors, except *The Linley Group estimate)
Table 14 40. Comparison of 100Gbps-and-above Carrier Ethernet switch chips. (Source: vendors)
Table 14 41. Comparison of Carrier Ethernet switch chips for access applications. (Source: vendors, except *The Linley Group estimate)
Table 14 42. Comparison of 10Gbps EDC components. *With EDC. (Source: vendors)
Table 14 43. Comparison of quad-channel 10Gbps retimers. (Source: vendors)
Table 14 44. Comparison of quad-port 10GBase-T PHY chips. (Source: vendors)
◆詳細はデータリソースウェブページをご覧ください。
http://www.dri.co.jp/auto/report/lg/lgenswphychip11.htm
◆リンレイグループ社 (The Linley Group)
http://www.dri.co.jp/linley/index.htm
株式会社データリソースは米国の調査会社リンレイグループ社 (The Linley Group)の日本販売代理店です。調査レポートの販売、委託調査などを行っています。
◆このプレスリリースに関するお問合せ
http://www.dri.co.jp/mail/quote.php
日本販売代理店
株式会社データリソース
107-0052 東京都港区赤坂1-14-5
アークヒルズエグゼクティブタワーN313
Tel：03-3582-2531 Fax：03-3582-2861
http://www.dri.co.jp
Eメール：info@dri.co.jp
